Synertec SY6502 – 8-bit CPU compatible with the MOS 6502, foundation of many home computer and console platforms

Definition

The Synertec SY6502 is an 8-bit CPU compatible with the MOS 6502 family, produced as a “second source” (an alternative supplier) to the original MOS device. The 6502 technology was designed in 1975 by MOS Technology and quickly became one of the most important microcomputing ecosystems thanks to its cost/performance balance and straightforward system integration.

In practical terms, the SY6502 provides the same programming model as the 6502: instruction set, core registers, and a bus interface intended for systems with external memory and I/O on a parallel bus, typical of late-1970s and 1980s architectures.

Historical context: why the 6502 “set the standard”

The 6502 is remembered as the CPU that contributed decisively to the rise of early consumer microcomputers and many mass-market platforms. In the case of Apple, adopting the 6502 enabled the design approach of the Apple I and especially the Apple II: a relatively linear architecture with a toolchain and firmware stack built around an efficient and affordable CPU.

At the same time, the 6502 “supply chain” (original plus second sources) spread widely across home computers and consoles, creating a huge base of software, know-how, and compatible components.

Logical architecture: essential registers and direct programming

The 6502 model is characterized by a minimal but very effective register set:

• Accumulator A (arithmetic/logic operations and transfers).

• Index registers X and Y (indexing and addressing modes).

• SP (stack pointer) with the stack in a dedicated page.

• PC (program counter) and P status register (flags).

The approach is very “direct”: efficiency depends heavily on addressing modes (zero page, indexed, indirect) and disciplined use of “near” memory (zero page) to achieve high performance with compact code.

Bus and system integration: external memory and peripherals

The 6502 (and therefore the SY6502) is designed for systems with:

• A 16-bit address bus (typical space up to 64 KB).

• An 8-bit data bus.

• Memory-mapped I/O or platform-specific interfacing logic.

This implies that ROM, RAM, and peripherals are selected through address decoding. A typical design revolves around: memory map, chip selects, read/write timing, and interrupt/reset handling.

Known uses: Apple, home computers, and consoles

The “6502 world” includes:

• Apple: the Apple I and Apple II are 6502-based.

• Commodore: many systems use the 6502 or close derivatives (for example 6510/8502 in some platforms).

• Nintendo Nintendo Entertainment System: a CPU derived from the 6502 (family-level core compatibility, with implementation-dependent functional differences).

• PC Engine: a 6502-compatible CPU in the 65C02/derivative class, with platform-specific extensions.

• Atari Lynx: a 65xx-family CPU (6502 compatibility) integrated into the system logic.

Practically, the key point is not only “which exact chip”, but the ecosystem: many platforms adopted 6502-compatible cores with variations (instructions, integrated I/O, audio, timing), while preserving strong conceptual continuity and a broadly compatible toolchain.

Sketch of the most important connections

                 address bus (A0..A15) + control signals
        ┌──────────────────────────────────────────────────────┐
        │                 glue logic / address decode           │
        │   RAM/ROM/I-O chip selects + optional wait/timing     │
        └───────────────────────────┬──────────────────────────┘
                                    │
                                    ▼
                         ┌────────────────────────┐
                         │     Synertec SY6502     │
                         │        8-bit CPU        │
                         │  A0..A15   D0..D7        │
                         │  R/W, clock, IRQ/NMI,    │
                         │  RESET, etc.             │
                         └───────────┬─────────────┘
                                     │
                                     ├────────► ROM (firmware/monitor/BASIC)
                                     ├────────► RAM (stack, variables, buffers)
                                     └────────► memory-mapped I/O (video, audio, input)

Table 1 – Identification data and specifications

Table 2 – Operational and design considerations