Math coprocessor

Definition

A math coprocessor (an FPU, floating-point unit) is a specialized processor that works alongside the CPU to execute floating-point arithmetic and advanced math functions—often faster and with more convenient numeric behavior than pure software routines. In the classic Intel 8087 design, the coprocessor pairs with 8086/8088 CPUs: the CPU runs the program’s control flow, while the 8087 performs heavy numeric operations.

Why it existed

Early 8086/8088 systems could handle integer math reasonably, but software floating-point was slow and instruction-heavy. Adding an 8087 significantly improved performance for workloads such as CAD, scientific computing, engineering graphics, simulation, and other numeric-intensive code.

How the 8087 cooperates with 8086/8088

The 8087 does not replace the CPU; it co-executes selected instructions:

• The CPU fetches/decodes instructions and issues escape (ESC) opcodes that represent FPU operations.

• The 8087 monitors the bus, recognizes those opcodes, and executes the operation internally.

• When memory operands are needed, the 8087 coordinates bus access to read/write data.

• The CPU may continue executing, but must synchronize when it needs results immediately.

This is an early, explicit form of hardware acceleration and limited parallel execution.

Connection and data-flow sketch

                 ┌───────────────┐
Program/control  │     8086/8088  │
 flow ─────────► │  CPU (control) │
                 └──────┬────────┘
                        │ System bus + ESC opcodes observed
                        ▼
                 ┌───────────────┐
Floating-point   │      8087     │
 math execution  │ coprocessor   │
                 └──────┬────────┘
                        │
                        ▼
                 Memory / results

Architecture and programming model

The 8087 uses a register stack model (commonly described as 8 levels, ST(0)…ST(7)). Many instructions implicitly operate on the top of stack (ST(0)), combining it with another stack element or a memory operand.

Common traits in an 8087-style FPU model:

• Register stack: implicit push/pop behavior in many instructions.

• Extended internal precision: intermediate calculations may use higher precision than stored formats.

• Numeric control: rounding modes, overflow/underflow behavior, and exception masking via FPU control/status.

What it accelerates

A math coprocessor like the 8087 primarily speeds up:

• Floating-point add/subtract/multiply/divide.

• Integer↔floating conversions.

• Square root and related ops.

• Selected transcendental functions (depending on the instruction set support).

Real-world gains depend on how much floating-point work the application performs and how often the CPU must wait for FPU results.

Synchronization and bottlenecks

Typical constraints of a discrete coprocessor design include:

• Result dependencies: CPU must wait when it immediately needs the FPU result.

• Memory transfers: shared bus access introduces latency.

• Floating-point exceptions: special numeric conditions may require careful control/status handling.

Table 1 – Key characteristics

Table 2 – System and programming concepts